Ravneet Singh

Ravneet is a Senior Specialist in aeSolutions Safety Instrumented Systems Front End Loading (SIS FEL) group based in Houston office. Ravneet has over 6 years of industry experience in instrumentation detail design, SIS implementation activities including Safety Integrity Level (SIL) verification calculations, safety requirement specification, Independent Protection Layer (IPL) verification, and IPL select. Ravneet has a Bachelor of Science in Electrical Engineering from Louisiana State University.

White Papers by Ravneet Singh:

Lessons Learned on SIL Verification and SIS Conceptual Design

There are many critical activities and decisions that take place prior to and during the Safety Integrity Level (SIL) Verification and other Conceptual Design phases of projects conforming to ISA84/IEC61511. These activities and decisions introduce either opportunities to optimize, or obstacles that impede project flow, depending when and how these decisions are managed. Implementing Safety Instrumented System (SIS) projects that support the long‐term viability of the Process Safety Lifecycle requires that SIS Engineering is in itself an engineering discipline that receives from, and feeds to, other engineering disciplines.

This paper will examine lessons learned within the SIS Engineering discipline and between engineering disciplines that help or hinder SIS project execution in achieving the long‐term viability of the Safety Lifecycle. Avoiding these pitfalls can allow your projects to achieve the intended risk reduction and conformance to the IEC 61511 Safety Lifecycle, while avoiding the costs and delays of late‐stage design changes. Alternate execution strategies will be explored, as well as the risks of moving forward when limited information is available.

Read More